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Flip Chip CSP

Features

  • Package Size: 3 x 3 mm up to 15 x 15 mm 
  • Line & Space 15/15 um 
  • Bump Pitch down to 140 um 
  • Impedance control for critical signal traces 
  • Structure range from 2 layers to 8 layers 
  • For products demanding high density and reliability 
  • For small package size with high electric performance product

Applications

  • Hand-held, Mobile, Net working, Smart phone, Consumer electronics and DTV …etc

Benefits

  • High I/O Count and Short Interconnects.
  • High layout density requirement.
  • Cost down - Die size can be reduced.